The present invention relates to capacitors and, more particularly, to non-planar capacitors with finely tuned (i.e., selectively adjusted) capacitance values and methods of forming the non-planar capacitors that can be readily integrated into the processes used in a design rule-dependent multi-gate non-planar field effect transistor (MUGFET) technology.
More specifically, integrated circuit design decisions are often driven by device scalability, device density, manufacturing efficiency and costs. For example, size scaling of planar field effect transistors (FETs) resulted in the development of planar FETs with relatively short channel lengths and, unfortunately, the smaller channel lengths resulted in a corresponding increase in short channel effects and a decrease in drive current.
In response, different types of multi-gate non-planar field effect transistor (MUGFET) technologies, such as fin-type FET (FINFET) technologies (also referred to herein as a dual gate non-planar FET technologies) and tri-gate non-planar FET technologies, have been developed. A FINFET is a non-planar FET comprising a relatively thin semiconductor body (typically referred to as a semiconductor fin) with top surface and opposing sidewalls and a channel region positioned laterally between source/drain regions. A gate stack is adjacent to the top surface and opposing sidewalls of the semiconductor body at the channel region. Since the semiconductor body of this FINFET is relatively thin, the FINFET essentially exhibits only two-dimensional field effects. That is, field effects are exhibited at the opposing sidewalls, but because the semiconductor body is so thin any field effects exhibited at the top surface are insignificant (i.e., negligible). A tri-gate non-planar FET is similar in structure to a FINFET. However, the semiconductor body of a tri-gate non-planar FET is relatively wide and, thus, the tri-gate non-planar FET exhibits three-dimensional field effects. Typically, multiple semiconductor bodies and/or multiple gate stacks will be incorporated into a given MUGFET structure in order to increase drive current as well as device density.
Additionally, since many integrated circuit designs require capacitors in addition to transistors, non-planar capacitors have also been developed along with methods of forming these non-planar capacitors. Generally, however, the processes used to form non-planar capacitors cannot readily be integrated into the processes used to form MUGFETs. Furthermore, the above-described MUGFET technologies are often design rule-dependent. That is, in a given MUGFET technology, the design rules require semiconductor bodies to be formed such that they are positioned laterally adjacent to each other (e.g., parallel to each other, substantially parallel to each other, slightly angled relative to each other so as to form a chevron pattern, etc.) and essentially identical in length, width, and height and such that the pitch is essentially uniform with the height being greater than ½ the pitch to ensure a relatively high current density as compared to a planar FET. Similarly, the design rules require gate stacks to be formed such that they traverse one or more of the semiconductor bodies and are essentially identical in length and height relative to the one or more semiconductor bodies and such that the gate pitch is essentially uniform. Thus, even when the processes used to form non-planar capacitors are integrated into the processes used to form MUGFETS, the capacitance values of the resulting non-planar capacitors are quantized (i.e., fixed) due to the layout requirements. Therefore, there is a need in the art for a non-planar capacitor with a finely tuned (i.e., selectively adjusted) capacitance value and a method of forming the non-planar capacitor that can be readily integrated into the processes used in a design-rule dependent multi-gate non-planar field effect transistor (MUGFET) technology.